Output driver comprising an improved control circuit

ABSTRACT

An electronic circuit comprising an output driver (DRV) for supplying a control signal (U 0 ), comprising a first power supply terminal (V DD ); a second power supply terminal (V SS ); a signal input terminal (IN) for receiving an input signal (U i ); a signal output terminal (OUT) for supplying the control signal (U 0 ); an output transistor (T 1 ) having a control terminal, and having a main current path coupled between the first power supply terminal (V DD ) and the signal output terminal (OUT); and a control circuit (CNTRL) responsive to the input signal (U i ) which supplies a control signal (U 1 ) to the control terminal of the output transistor (T 1 ), which control circuit (CNTRL) comprises a buffer (BF) having an output which is coupled to the control my terminal of the output transistor (T 1 ), and having a first power terminal which is coupled to the first power supply terminal (V DD ). The control circuit also supplies a further control signal (U 2 ) to the control terminal of a further output transistor (T 2 ) which has a main current path coupled between the signal output terminal (OUT) and the second power supply terminal (V SS ). The input signal (U i ) controls a switch S. In consequence, an input of the buffer is charged with a current value I by means of current source (J 1 ) or discharged with a current value I by means of current source (J 1 ) and current source (J 2 ). Thus a digital signal which is responsive to the input signal (U i ) is available at the input of the buffer (BF). The control circuit (CNTRL) further comprises a control field effect transistor (T 3 ) having a gate, a source connected to a second power terminal of the buffer (BF), and a drain connected to the second power supply terminal (V SS ). A zener diode (Z 1 ) is connected between the second power supply terminal (V DD ) and the gate of the control field effect transistor (T 3 ). A third current source (J 3 ) supplies current through the zener diode (Z 1 ). The potential at the gate of the control field effect transistor (T 3 ) is stabilized with respect to the potential at the first power supply terminal (V DD ). Therefore also the potential (V RF ) at the source of the control field effect transistor (T 3 ), and thus at the second power terminal of the buffer (BF), is more or less stabilized with respect to the potential at the first power supply terminal (V DD ). The control field effect transistor (T 3 ) receives the current from the second power terminal of the buffer (BF) and transfers it to the second power supply terminal (V SS ).

The invention relates to an electronic circuit comprising an outputdriver for producing a control signal, including a first supplyterminal; a second supply terminal; a signal input terminal forreceiving an input signal, a signal output terminal for supplying thecontrol signal; an output transistor having a control electrode and amain current path which is coupled between the first supply terminal andthe signal output terminal; and a control circuit which supplies acontrol signal to the control electrode of the output transistor inresponse to the input signal, the control circuit comprising a buffer ofwhich an output is coupled to the control electrode of the outputtransistor and of which a first supply connection point is coupled tothe first supply terminal.

Such an electronic circuit is known from the general state of the art asshown in FIGS. 1 to 4.

FIG. 1 shows a circuit in which the output transistor is implemented viafield effect transistor T₁ of which a source is connected to the firstsupply terminal V_(DD) and a drain is connected to the signal outputterminal OUT. The circuit further includes a further output transistorwhich is implemented via field effect transistor T₂ of which a source isconnected to the second supply terminal V_(SS) and a drain is connectedto the signal output terminal OUT. A load Z_(L) for receiving thecontrol signal U₀ is coupled between the signal output terminal OUT andthe second supply terminal V_(SS). The circuit further includes acontrol circuit CNTRL which has a signal input terminal IN for receivingthe input signal U_(i). The control circuit CNTRL produces a controlsignal U₁ between the gate and source of the output transistor T₁ inresponse to the input signal U_(i), and a control signal U₂ between thegate and source of the further output transistor T₂. The control signalsU₁ and U₂ are such that when the output transistor T₁ is turned on, thefurther output transistor T₂ is not, and vice versa.

The invention particularly relates to the case where a supply voltage ofthe electronic circuit, which supply voltage is coupled between thefirst and second supply voltage terminals, is relatively high, forexample 100 volts. Especially when used in an integrated circuit, thishigh supply voltage gives rise to a complicated control circuit. Afterall, a standard buffer circuit which is designated BF in FIG. 1 can thennot be fed directly from the supply voltage, because the gate sourcevoltage of the output transistor T₁ cannot withstand such a highvoltage. Worded differently, a logical low level on the gate of theoutput transistor T₁ still has a relatively high value (for example 95volts if the supply voltage is 100 volts) compared to the supplyvoltage. The control of the further output transistor T₂, however, doesnot have this problem. This is because the input signal U_(i) isreferred to the second supply terminal or to the source of the furtheroutput transistor T₂. In this patent application the control of thefurther output transistor T₂ is not described because it may be appliedaccording to known techniques.

In the general state of the art a solution for controlling the outputtransistor T₁ is offered in a way as shown in FIG. 2. If the gatevoltage of the output transistor T₁ is to be logically high and theoutput transistor T₁ must not become conductive, the switch is in theopen state as shown, so that the current source which is coupled betweenthe switch and the second supply terminal V_(SS) cannot produce currentthrough the resistor R which is coupled between the gate and source ofthe output transistor T₁. As a result, the gate-source capacitance ofthe output transistor T₁ will be discharged via the resistor R so thatthe gate potential becomes substantially equal to the potential on thefirst supply terminal V_(DD), thus, for example, equal to 100 volts. Nowif the gate voltage of the output transistor T₁ is to become logicallylow, and thus the output transistor T₁ is to be turned on, the switch isclosed, so that a current flows through the parallel circuit of theresistor R and a zener diode Z₁. A zener diode Z₁ provides that thepotential on the gate of the output transistor T₁ cannot reach a valuebelow the value displayed, for example, 95 volts.

A disadvantage of the known solution according to FIG. 2 is that thedischarging of the gate-source capacitance of the output transistorthrough said resistor is a relatively slow process so that the circuitis unsuitable for a relatively high frequency of the input signal.

In the general state of the art the problem mentioned above is reducedby applying the circuit as shown in FIG. 3. Compared to FIG. 2, thiscircuit includes an additional current source and a switch connected inseries with a current mirror. The moment the right-hand switch isopened, the left-hand switch is closed, so that the current mirrorraises the gate voltage of the output transistor T₁ more rapidly (theresistor R may be omitted as appropriate). A disadvantage of thissolution is that the dissipation of the circuit increases significantlyfrom the addition of the additional current source (mind you that thesupply voltage may be, for example, 100 volts!). In principle, thisdissipation may be reduced by choosing a relatively low value for theadditional current source. However, the current mirror is then to have arelatively large current mirror ratio. As a result, however, thecapacitance on the input of the current mirror will be much larger sothat the circuit again becomes slower.

An alternative prior-art circuit which reduces said disadvantages isshown in FIG. 4. A current source J₁ which supplies a current I iscoupled between the first supply terminal V_(DD) and an input of thebuffer BF. A series combination of a second current source J₂, whichsupplies a current 2I, and a switch S is coupled between the input ofthe buffer BF and the second supply terminal V_(SS). A parallel circuitof a zener diode is Z₁ and a smoothing capacitor C is coupled betweenthe first supply terminal V_(DD) and the second supply connection pointof the buffer BF. The zener diode Z₁ is supplied with current by a thirdcurrent source J₃. This circuit operates as follows. The combination ofthe zener diode Z₁ and smoothing capacitor C provides that the buffer BFreceives a relatively low supply voltage (for example 5 volts), whereasthe supply voltage of the circuit is relatively high (for example 100volts). Under the control of the input signal U_(i) the switch S iseither opened, so that the voltage on the input of the buffer BF rises,or the switch is closed, so that the voltage on the input BF drops.While the switch S is being switched on or off, peak currents flowingthrough the supply connection points of the buffer BF may become solarge that the impedance of the zener diode Z₁ is not low enough for thesupply voltage of the buffer BF to be kept sufficiently constant. Forthis reason the smoothing capacitor C across the zener diode Z₁ isindispensable. Especially when applied in an integrated circuit, the useof the smoothing capacitor C is highly undesired. The capacitance valueof the smoothing capacitor is so large that this capacitor cannot beintegrated and thus is to be connected to the integrated circuit as anexternal component. This is further disadvantageous in that theintegrated circuit then needs an additional connection pin.

It is an object of the invention to provide an electronic circuit withan output driver which is suitable for operation at a relatively highsupply voltage and which is suitable for processing an input signal witha relatively high frequency and which can be used in an integratedcircuit without the need for non-integrable components.

According to the invention the electronic circuit defined in the openingparagraph is characterized in that the output driver further includes acurrent receiving transistor which has a main current path that iscoupled between a second supply connection point of the buffer and thesecond supply terminal, and has a control electrode for receiving areference potential.

The current receiving transistor may comprise, for example, a fieldeffect transistor whose source is coupled to the second supplyconnection point of the buffer and whose drain is coupled to the secondsupply terminal of the electronic circuit. A current peak from thesecond supply connection point of the buffer is now discharged by thecurrent receiving transistor to the second supply terminal of thecircuit without an impermissible large peak arising in the supplyvoltage of the buffer during this operation. This is because the sourceconnection of the current receiving transistor is low ohmic.

An embodiment of an electronic circuit according to the invention ischaracterized in that the output driver further includes voltagestabilizing means for stabilizing the reference potential relative tothe potential on the first supply terminal.

By stabilizing the reference potential relative to the first supplyterminal in lieu of relative to the second supply terminal of thecircuit, the supply voltage of the buffer remains substantially constantwhen the supply voltage between the first and second supply terminals ischanged. For that matter, the potential on the gate of the currentreceiving transistor goes along with the potential on the first supplyterminal of the electronic circuit. Since the gate source voltage of thecurrent receiving transistor is substantially constant, also thepotential on the second supply connection point of the buffer goes alongwith the potential on the first supply terminal of the electroniccircuit.

An embodiment of the electronic circuit according to the invention ischaracterized in that the voltage stabilizing means comprise: a zenerdiode which is coupled between the first supply terminal and the controlelectrode of the current receiving transistor; and current productionmeans for producing a current flowing through the zener diode. Since thecurrent flowing through the zener diode is substantially independent ofthe current flowing through the current receiving transistor, it is notnecessary to connect a smoothing capacitor in parallel with the zenerdiode.

An embodiment of the electronic circuit according to the invention ischaracterized in that the output driver further includes feedback meansof which an input is coupled in series between the main current path ofthe current receiving transistor and the second supply terminal and ofwhich an output is coupled to the control electrode of the currentreceiving transistor.

The feedback means provide a further reduction of the impedance at thesource of the current receiving transistor. As a result a possible(small already) voltage peak on the source of the current receivingtransistor is still further reduced.

An embodiment of the electronic circuit according to the invention ischaracterized in that the output driver further includes a resistorwhich is coupled in series with the zener diode. This series combinationprovides a still further reduction of the voltage peak on the source ofthe current receiving transistor.

The invention will be further explained with reference to the appendeddrawing in which:

FIGS. 1 to 4 show prior art output drivers,

FIG. 5 shows a circuit diagram of an embodiment of an electronic circuitcomprising an output driver according to the invention; and

FIG. 6 shows a further circuit diagram of an embodiment of an electroniccircuit comprising an output driver according to the invention.

In these Figures like components or elements are indicated by likereference signs.

FIG. 5 shows a circuit diagram of an embodiment of an electronic circuitcomprising an output driver DRV according to the invention. The outputdriver DRV is fed from a mains voltage which is coupled between thefirst supply terminal V_(DD) and the second supply terminal V_(SS). Theoutput driver DRV comprises a control circuit CNTRL, an outputtransistor T₁ and a further output transistor T₂. The output driver DRVhas an input terminal IN for receiving an input signal U_(i) between theinput terminal IN and the second supply terminal V_(SS). The controlcircuit CNTRL sends a control signal U₁ to the output transistor T₁ inresponse to the input signal U_(i) and sends a further control signal U₂to the further output transistor T₂. As a result a control signal U₀ isproduced on a load Z_(L) between the output terminal OUT and the outputdriver DRV and the second supply terminal V_(SS). The sources of thetransistors T₁ and T₂ are connected to the first supply terminal V_(DD)and a second supply terminal V_(SS), respectively. The drains of thetransistors T₁ and T₂ are connected to the output terminal OUT. Thecontrol circuit CNTRL includes a buffer BF, a first current source J₁, asecond current source J₂, a third current source J₃, a current receivetransistor T₃, a switch S, and a zener diode Z₁. An output of the bufferBF is connected to the gate of transistor T₁. A first supply connectionpoint of the buffer BF is connected to a source of the first supplyterminal V_(DD). A second supply connection point of the buffer BF isconnected to a source of transistor T₃. A drain of transistor T₃ isconnected to the second supply terminal V_(SS). The zener diode Z₁ iscoupled between the first supply terminal V_(DD) and a gate oftransistor T₃. A first current source J₃ is coupled between the firstsupply terminal V_(DD) and the input of the buffer BF. The switch S andthe second current source J₂ are connected in series between the inputof the buffer BF and the second supply terminal V_(SS). The thirdcurrent source J₃ is coupled between the gate of the transistor T₃ andthe second supply terminal V_(SS).

The output driver DRV operates as follows. Depending on the logic levelof the input signal U_(i), the switch S is either opened as indicated inFIG. 5, or closed. By way of example it is assumed that the switch S isopen when the input signal U_(i) has a logic low value. In that case thefirst current source J₁ which produces a current I takes the input ofthe buffer BF to a logic high level. As a result, the control signal U₁between the gate and the source of the transistor T₁ is substantiallyequal to zero volts and the transistor T₁ is turned off, whereastransistor T₂ is turned on. As a result, a control signal U₀ is a logiclow value. When, subsequently, the input signal U_(i) changes from alogic low value to a logic high value, the switch S is closed. As aresult, both the first and the second current source J₁ and J₂ areconnected to the input of the buffer BF. The second current source J₂,however, produces twice as large a current as the first current sourceJ₁ and, moreover, in opposite direction. In consequence, the input ofthe buffer BF is taken to a logic low value. The result is that thecontrol signal U₁ has a logic high value, for example 5 volts. At thesame time the further control voltage U₂ between the gate and the sourceof the transistor T₂ is substantially equal to 0 volts, wordeddifferently, transistor T₁ is turned on while transistor T₂ is turnedoff, so that the control signal U₀ adopts a logic high value. Thecontrol signal U₀ will thus become equal to about 100 volts. During thechange from a logic low value to a logic high value of the input signalU_(i) and vice versa, a peak current will flow through the supplyconnection points of the buffer BF. This peak current, however, isreceived by the current receiving transistor T₃. Only a relatively lowpeak voltage is developed on the source of transistor T₃ because theimpedance on the source of transistor T₃ is relatively low. The peakcurrent is transferred to the second supply terminal V_(SS) by thetransistor T₃. Consequently, there is no peak current flowing throughthe zener diode Z₁. As a result, contrary to known output drivers, it isnot necessary to decouple the zener diode Z₁ by a smoothing capacitor.

If the supply voltage of the output driver DRV is 100 volts by way ofexample and the desired supply voltage for the buffer BF is 5 volts,whereas the gate-source voltage of transistor T₃ is 1 volt, thepotential V_(RF) on the gate of transistor T₃ is to be set to 94 volts.This is realized by selecting a 6-volts type for the zener diode Z₁.

FIG. 6 shows a circuit diagram of a further embodiment of an electroniccircuit including an output driver according to the invention. Theoutput driver DRV comprises feedback means FBMNS which is connected withan input 1 to the drain of transistor T₃ and with an output 2 to thegate of transistor T₃. The feedback means FBMNS comprise a currentmirror CM whose input forms the input 1 and whose output is coupled withthe gate of the transistor T₃ via a resistor R₂ and a voltage levelshift transistor T₄. The third current source J₃ is now coupled betweenthe source of transistor T₄ and the second supply terminal V_(SS). Aresistor R₁ is coupled in series with the zener diode Z₁. The switch Sis arranged here as a field effect transistor which is coupled with agate to the input terminal IN. To avoid the potential on the input ofthe buffer BF becoming too low, so that the voltage difference betweenthe first supply terminal V_(DD) and the input of the buffer BF couldbecome much too high, a second zener diode Z₂ is coupled between thefirst supply terminal V_(DD) and a second supply connection point of thebuffer BF, and a diode is coupled between the input of the buffer BF andthe second supply connection point of the buffer BF. The feedback meansFBMNS provide that when the current flowing through the transistor T₃increases, and thus the gate-source voltage of transistor T₃ increases,the current produced by the output of the current mirror CM increases.As a result, the current flowing through the series combination of thezener diode Z₁ and resistor R₁ increases, so that the voltage V_(RF),which is indicated in FIG. 6, increases. In consequence, the gatevoltage of the transistor T₃ drops. Thus the potential on the source oftransistor T₃ remains even more constant. The resistor R₂ is used forlimiting the maximum current that may flow through resistor R₁.

1. An electronic circuit comprising an output driver (DRV) for producinga control signal (U₀), including a first supply terminal (V_(DD)); asecond supply terminal (V_(SS)); a signal input terminal (IN) forreceiving an input signal (U_(i)), a signal output terminal (OUT) forsupplying the control signal (U₀); an output transistor (T₁) having acontrol electrode and a main current path which is coupled between thefirst supply terminal (V_(DD)) and the signal output terminal (OUT); anda control circuit (CNTRL) which supplies a control signal (U₁) to thecontrol electrode of the output transistor (T₁) in response to the inputsignal (U_(i)), the control circuit (CNTRL) comprising a buffer (BF) ofwhich an output is coupled to the control electrode of the outputtransistor (T₁) and of which a first supply connection point is coupledto the first supply terminal (V_(DD)), characterized in that the outputdriver (DRV) further includes a current receiving transistor (T₃) whichhas a main current path that is coupled between a second supplyconnection point of the buffer (BF) and the second supply terminal(V_(SS)), and has a control electrode for receiving a referencepotential (V_(RF)).
 2. An electronic circuit as claimed in claim 1,characterized in that the output driver (DRV) further includes voltagestabilizing means for stabilizing the reference potential (V_(RF))relative to the potential on the first supply terminal (V_(DD)).
 3. Anelectronic circuit as claimed in claim 1, characterized in that thevoltage stabilizing means comprise: a zener diode (Z₁) which is coupledbetween the first supply terminal (V_(DD)) and the control electrode ofthe current receiving transistor (T₃); and current production means (J₃)for producing a current flowing through the zener diode (Z₁).
 4. Anelectronic circuit as claimed in claim 1, 2 or 3, characterized in thatthe output driver (DRV) further includes feedback means (FBMNS) of whichan input (1) is coupled between the main current path of the currentreceiving transistor (T₃) and the second supply terminal (V_(SS)), andof which an output (2) is coupled to the control electrode of thecurrent receiving transistor (T₃).
 5. An electronic circuit as claimedin claim 3 or 4, characterized in that the output driver (DRV) furtherincludes a resistor (R₁) which is coupled in series with the zener diode(Z₁).